1. Field of Invention
Various embodiments relate generally to a nonvolatile memory device, and more particularly, to a three-dimensional nonvolatile memory device, a semiconductor system including the same, and a method of manufacturing the same.
2. Description of Related Art
Memory devices having a three-dimensional structure typically include memory cells arranged in a three dimensional configuration. Since memory devices having a three dimensional structure often utilize the area of a substrate relatively more efficiently than a memory device having a two-dimensional structure, memory devices having a three-dimensional structured memory devices may permit a relatively greater degree of integration. Examples of such memory devices include nonvolatile memory devices. An example of a nonvolatile memory device is a NAND flash memory.
Three-dimensional nonvolatile memory device may include a plurality of strings. Each string includes memory cells stacked in a plurality of layers over a substrate and a selection transistor. Each string may have an ‘I’ shape or a ‘U’ shape. A three-dimensional nonvolatile memory device having I-shaped strings may be referred to as a Terabit Cell Array Transistor (TCAT) or Bit-Cost Scalable (BICS). A three-dimensional nonvolatile memory device having a U-shaped string may be referred to as Pipe-shaped Bit-Cost Scalable (P-BICS).
In the implementation of P-BICS technology, a string typically includes two vertical channel layers. For example, a first vertical channel layer and a second vertical channel layer may be electrically coupled via a pipe transistor, a bit line may be electrically coupled to an upper portion of the first vertical channel layer, and a source line may be electrically coupled to an upper portion of the second vertical channel layer.
A contact plug may be formed between the first vertical channel layer and the bit line and may electrically couple the first vertical channel layer and the bit line. A contact plug may be formed between the second vertical channel line and the source line and may electrically couple the second channel layer and the source line.